On-Board Computer Architecture with an FPGA SoC: Adding Hardware Functions After the PCB Is Frozen

On an FPGA SoC the processor runs the base software, while programmable logic takes parallel or timing-critical work and any interface the processor lacks. Because the fabric stays reconfigurable after the board is frozen, functions can be added, moved from processor to logic, or fixed without a respin. On Latitude's launch-vehicle on-board computer, InTechHouse later used spare FPGA resources to add GPS-based time synchronization.

Key takeaways

• An FPGA SoC (system on chip) puts processor cores and programmable logic on one device, so the on-board computer keeps hardware flexibility after the PCB is frozen.
• A plain processor or microprocessor limits you to its fixed peripherals; the FPGA fabric lets you add hardware blocks later.
• Four practical ways to change hardware after the freeze: offload compute, fix an interface or IP core, move a function off the processor into logic, and change functions after deployment.
• On Latitude, spare FPGA resources were later used to add GPS time synchronization.
• The costs are real: FPGAs are not the cheapest route, the tools keep changing, and fewer engineers know programmable logic.

Processor or FPGA SoC: what changes once the board is frozen

The difference is what you can still change after the board is built. With a processor alone, you get its peripherals and nothing more: its external interfaces and its internal blocks, such as hardware accelerators. With an FPGA SoC, the programmable logic gives you room to add hardware functions long after the PCB layout is closed.

"We can predict at design stage what hardware we need and what functions we want, but closing the hardware at board level always limits you somehow. Even when the hardware is closed and fully tested, an FPGA still lets you change or add hardware functions, even during the mission or after deployment."

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Adam Szychulec, Vice CTO, InTechHouse

For an on-board computer that will stay in service for years, that flexibility is an engineering asset. Requirements change, interfaces turn out to behave differently than their datasheets suggest, and new functions get added to the mission. A design with programmable logic can absorb those changes in the same device, without a board respin.

What sits inside an FPGA SoC

An FPGA SoC combines two parts on a single chip. The processing system (PS) carries hard processor cores, typically Arm application cores able to run Linux or a real-time operating system, plus hard peripherals and memory controllers. The programmable logic (PL) is the FPGA fabric, where you build custom hardware blocks in digital design tools. More advanced families add further building blocks: the AMD/Xilinx Zynq UltraScale+ MPSoC, for example, pairs Cortex-A53 application cores running at up to 1.5 GHz with real-time Cortex-R5F cores running at up to 600 MHz and a graphics processor (AMD, 2022). Zynq is the family our team mainly works with. For the full explanation of the architecture, read our guide to the SoC FPGA.

How the processor sees the fabric

On a single-chip SoC, the processor reaches data in the fabric through built-in interfaces, typically AXI buses. There is no separate CPU on another board and no external link to manage.

"From the processor's point of view it's like reading a register in memory, while underneath, all the operations and computation can run in the FPGA."

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Adam Szychulec, Vice CTO, InTechHouse

That simple model is what makes the integration practical. The embedded software reads and writes registers, while the logic underneath delivers deterministic timing and low latency that software alone cannot guarantee. Both sides sit on the same device, so the data path between them is short, fixed at design time and runs at on-chip speed. Packing processor and logic into a single device also reduces PCB size, which is why the same architecture is common in other embedded applications, such as robotics, communications and industrial motor control.

Four ways to add or change hardware functions after the PCB is frozen

Each mechanism below keeps the board unchanged and puts the change into programmable logic. They suit different situations, and each comes with one practical caution.

Offload compute into programmable logic

You can add compute functions inside the FPGA later, offloading the processor or speeding up a function whose nature suits hardware, such as filtering or parallel data processing. These functions need no external interface, so the board itself is not affected. The caution: plan spare logic, memory and power budget at design stage, because hardware acceleration added later can only use what the original design left free. For when offloading pays off, see our article on FPGA hardware acceleration.

Fix an interface or IP core in logic, not with software workarounds

If an interface such as UART, SPI or I²C, or an IP core used in the design, has a problem, the fix can be made later in the FPGA. Without programmable logic, the same problem usually ends in a software workaround or a respin.

"Because we have the FPGA, we don't have to look for software workarounds. We can change it later."

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Adam Szychulec, Vice CTO, InTechHouse

The caution: a logic fix still needs full re-verification, because the changed block has to pass the same tests as the original design.

Start on the processor, migrate to logic when needed

Functions such as pre-analysis or buffering of interface data can start on the processing system and move into programmable logic later. This is a phasing strategy: ship the function in firmware first, then migrate it to hardware when data rates or timing demands grow. It keeps early programming effort low and gives a scalable path for later. The caution: define the register interface between PS and PL early, so the software side does not change when the function moves.

Change functions during the mission or after deployment

As a general FPGA capability, hardware functions can be changed or added even during a mission or after deployment, by loading a new configuration into the FPGA fabric. Some devices also support partial reconfiguration, where part of the fabric is reloaded while the rest keeps running. The caution: every in-service update needs a controlled and verified update path, so the system cannot end up with a corrupted configuration.

Worked example: GPS time synchronization added to Latitude's on-board computer

InTechHouse case study: Latitude on-board computer

InTechHouse delivered the complete hardware of the on-board computer for Latitude's Zephyr launch vehicle. After the board was designed, spare FPGA resources were used to add time synchronization with the GPS signal and correction of internal time to clock cycles. Those mechanisms then underpinned the time synchronization functions, implemented as a PTP v2 IP core in the FPGA. The board itself did not change. Latitude describes the result as "a fully qualified On-Board Computer for space vehicle."

For how the timing works in detail, read PTP v2 time synchronization in an FPGA.

Power design: why a PMIC instead of discrete converters

A PMIC (power management IC) simplifies the whole power design and makes correct sequencing of the supply rails easier. A typical processor needs several voltage rails, switched on in a defined order. The alternative to a PMIC is three to six separate converters for those rails, plus circuitry to control their switch-on order. That takes more board space and more work at bring-up. A PMIC saves space, keeps power consumption under control in one optimized device, and makes the rail sequence easy to configure.

The honest costs of an FPGA SoC

An FPGA SoC is not the right choice for every on-board computer. Three costs come with it:

• It is not the cheapest route. The device costs more than a comparable microprocessor, and the design takes more engineering time.
• The tools are buggy and keep changing. FPGA toolchains evolve fast, and each version can bring new issues to work around.
• Fewer engineers can work on it. Many embedded engineers do not work in programmable logic at all, so the design depends on a smaller pool of specialists.

These costs buy reliability of a different kind: the ability to fix and extend the hardware without replacing it.

When a plain processor or microcontroller is enough

If the interfaces and compute fit a processor, and nothing will be added later, a processor is simpler. Microcontrollers and standard processors have mature tools, a larger pool of engineers and lower unit cost. Choose the FPGA SoC when you need the flexibility, not by default. For the wider decision see custom vs COTS on-board computer and our comparison of FPGA vs microcontroller.

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